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RESEARCH PROGRAM
italiano - inglese
Research Units
- Politecnico di MILANO
ELETTRONICA E INFORMAZIONE
MILANO(MI) - Università degli Studi di BOLOGNA
ELETTRONICA, INFORMATICA E SISTEMISTICA
BOLOGNA(BO) - Università degli Studi di CATANIA
INFORMATICA E TELECOMUNICAZIONI
CATANIA(CT) - Politecnico di TORINO
AUTOMATICA E INFORMATICA
TORINO(TO) - Università degli Studi di VERONA
INFORMATICA
VERONA(VR)
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Scientific and education field classification
International Patent Classification
- PHYSICS
- COMPUTING; CALCULATING; COUNTING (score computers for games A63; combinations of writing applicances with computing devices B43K29/08)
- ELECTRICAL DIGITAL DATA PROCESSING (computers in which a part of the computation is effected hydraulically or pneumatically G06D; optically G06E; self-contained input or output peripheral equipment G06K; impedance networks using digital techniques H03H) [C9603]
- COMPUTING; CALCULATING; COUNTING (score computers for games A63; combinations of writing applicances with computing devices B43K29/08)
Geographical classification
- Region: Lombardia
Keywords
EMBEDDED SYSTEMS; HW/SW CO-DESIGN; MULTI-PROCESSOR ON-CHIP; PLATFORM-BASED EXPLORATION; PERFORMANCE EVALUATION; POWER ESTIMATION; SYSTEM-LEVEL DESIGN; SYSTEM SPECIFICATION; OPTIMIZATION TECHNIQUESDesign methodologies for platform-based multi-processor systems-on-chip
Politecnico di MilanoAbstract
Two main design issues are emerging in embedded systems design: the shift towards multiprocessor System-on-Chip architectures, as a way to scale complexity by allocating loads on distributed resources, and the exploitation of platforms, which can be customized and configured to implement a variety of applications in order to provide efficient and low cost solutions.These two design issues are particularly evident in the factory automation, multimedia and telecom fields. In the first field, isolated and conventional control devices are and will be sensibly replaced by network of processors, which should be platform based to be easily adapted to a variety of standards and application environments. In streaming multimedia applications, parallelism will provide a significant difference with respect to traditional SOC implementations, because it implies different types of locality and a significant amount of accesses to the shared memory, for both inter-process synchronization and commmunicatin, and for the storage of shared data. In the telecom field, devices should be platform based to address the continuous growth in the network bandwidth and services, the requirement of high flexibility to adapt to rapid market changes, and the introduction of new protocols.
In this scenario, the ability of effectively customizing an application onto a multiprocessor platform is the key aspect for designing the current and next generation of embedded systems >>>
Principal Investigator
Donatella SCIUTO Politecnico di MILANOResearch Objectives
The main goal of the research is the development of a design methodology for platform-based multi-processor Systems-on-Chip (MPSoCs). A system-level MPSoC target architecture at very high integration scale will be considered, that will be composed of a set of clusters (processign elements) connected by a high scalable network on-chip. In this scenario, the main goal of this research is the definition of the design methodologies to support the modelling, simulation and verification of multi-processor platforms, the methodologies for hardware/software partitioning and system-level exploration and methodologies for the mapping of the application for the definition of the more efficient solution based on the type of the application itself.1) Modelling, simulation and verification of platforms for MPSoCs
The main effort of this research unit will be spent developing a platform modeling/simulation/verification framework that allows the exploitation of the following aspects:
- Hardware/network co-simulation via the integration of the system level SystemC language with network simulators;
- Hardware/software/middleware co-simulation via the integration of the system level SystemC language with compiled embedded software;
- Assertion-based verification of the hardware part via the integration of the SystemVerilog language with the co-simulation framework and/or supporting SystemC/PSL descriptions.
The SystemC >>>
Timescale
24 monthsNational and international background
In this chapter will be described the scientific background, in terms of technology and methodology, for the proposed research work, followed by the main know-how of each research unit in each research area.Given the complexity and differences of the research themes afforded in the proposed research, the scientific background has been divided into different research areas:
A1) DESIGN METHODOLOGIES FOR MULTI-PROCESSOR SYSTEM-ON-CHIP PLATFORMS
The development of new and powerful multiprocessor systems-on-a-chip (MPSoC) with increasingly complex features can meet the stringent time-to-market constraints if it exploits the platform-based design paradigm [A1.1]. Moreover, another emerging design issue concerns the shift towards networked architectures [A1.2], as a way to scale complexity by allocating loads on distributed resources, which can be customized and configured to implement a variety of applications in order to provide efficient and low cost solutions. These two design issues are particularly evident in the automotive, factory-automation, telecom and multimedia fields. In the first two fields, isolated and conventional control devices are and will be sensibly replaced by networked embedded systems, which should be platform-based to be easily adapted to a variety of standards and application environments. In the telecom and multimedia fields, devices are networked by construction and should be platform-based to address the >>>



